;	Hitachi SH Math Support
;	Copyright 1999 Metrowerks, Inc.
		
		.EXPORT     __l_modu
		.SECTION    .text

;
;	unsigned int _l_modu(int I1, int I2)
;
;	Notes:
;	Runtime support routine.
;
__l_modu:


;	_divu32r	-	Remainder of 32 bit / 32bit (Unsigned)
;	
;	Input: 	R4	divident
;			R5	divisor
;	Output:	R0	remainder
;			T	error flag (T=1 : error)
;
;	Notes:
; 	Divides the divident (unsigned 32 bits) by the divisor (unsigned 32 bits)
;	and determines the remainder (unsigned 32 bits). Also indicates and error
;   (division by 0) in the T bit.
;

_divu32r:

		MOV		R5,R2
		MOV		R4,R1

		TST		R2,R2		; divisor = 0 ?  
		BT		DIVU32R2	; yes
		XOR		R0,R0		; R0 = H'00000000

		DIV0U				; divide as unsigned
		
		ROTCL	R1			; divide 1 step
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0

		ROTCL	R1			
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		
		ROTCL	R1		
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		
		ROTCL	R1			
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		ROTCL	R1
		DIV1	R2,R0
		
		BT		DIVU32R1	; T bit = 1?
		ADD		R2,R0		; clear oversub
DIVU32R1
		RTS
		CLRT				; T bit = no error
DIVU32R2
		RTS
		SETT				; T bit = error

__l_modu_end:
				
	  .END
